The present invention relates generally to bridge circuits, and more particularly to bridged output drive circuitry for amplifiers.
It is helpful to consider the features of certain analog amplifiers and certain digital amplifiers known in the art in order to understand the advantages of the present invention.
The disadvantages of analog amplifiers are well known and numerous mechanisms have been implemented in the art to overcome their deficiencies. Efforts to overcome the poor efficiency of analog amplifiers, among other things, gave rise to the development of relatively higher efficiency switching amplifiers. However, switching amplifiers have their own deficiencies, including difficulties in processing small signals without undesirable distortion. Binary switching amplifiers, in particular, are known to produce ripple in small output signals when a modulation carrier frequency is removed from the amplified signal.
Mechanisms to improve the performance of binary switching amplifiers have involved implementing more output switching states. The conventional two output states of binary switching amplifiers have been supplemented, and performance has been improved by known switching amplifiers implementing third (xe2x80x9cternaryxe2x80x9d) and fourth (xe2x80x9cquaternaryxe2x80x9d) output switching states. For instance, U.S. Pat. No. 5,077,539 (xe2x80x9cthe ""539 patentxe2x80x9d) issued Dec. 31, 1991, owned by the present assignee and incorporated herein by reference, describes ternary and quaternary modes of switching operation implemented in an amplifier design to overcome distortion affecting small signal inputs to the switching amplifier.
Ternary or tri-state mode waveforms represent input signal amplitude information as the timed width and polarity pulses, comprising discrete amplitudes of zero, positive or negative polarity. With ternary techniques, signal information is directly converted to appropriately wide pulses of positive or negative polarity.
The ternary implementation as disclosed in the referenced patent, however, contains an error source which limits its use in audio or servo motor amplifier applications. This error source produces output signal distortion because of non-linearity in the output transfer function for small input signals, specifically as the input signal transitions through zero. For small input signals, performance degradation results because of the finite rise and fall times of the output signals produced by the power switching circuit. These switch times represent a fixed magnitude error, subtracted from a diminishing magnitude signal, which produces a non-linear gain characteristic and signal distortion.
In order to overcome the non-linear behavior of the tri-state embodiment, it is known in the prior art to introduce a fourth state, specifically to linearize the output transition through zero. For small input signals, the four-state or quaternary embodiment, which is described in detail in the referenced patent, employs an analog amplifier to affect a linear transition through zero. This fourth output state employs a linear analog amplifier in conjunction with ternary switching to linearize small signal performance. Below a predetermined signal magnitude, the load is switched to the linear analog amplifier and the ternary power switch is disabled. Above the magnitude threshold, the power switch is enabled and the load is disconnected from the linear amplifier. This compromise solution offers certain advantages, however, like the binary and ternary implementations, it suffers particular disadvantages.
The ternary and quaternary techniques known in the prior art accept an analog input signal, which in those analog implementations require no signal conversion means to interface to a linear analog amplifier. In those implementations, all signal processing uses analog means, i.e. analog circuitry is used to implement signal conversion, pulse width modulation control, and output linearization for small signals. However, these analog implementations are not cost effective because, for example, very large scale integrated circuitry can not be economically used to implement the analog designs. The alternative non-integrated configuration occupies excessive space.
Furthermore, for amplifier input signals that are inherently digital, as from the output of digital audio media, CD-ROM, digital control systems, or the like, the analog prior art requires signal conversion circuitry to interface with the analog switching amplifier implementations(s). Interface circuitry at the front end of the amplifier can degrade performance and further burden system cost.
An all digital switching amplifier that can be implemented on low cost application specific integrated circuits is disclosed in U.S. Pat. No. 5,617,058 to Adrian et al. (xe2x80x9cthe ""058 patentxe2x80x9d) also owned by the present assignee and incorporated herein by reference. The all digital switching amplifier of the ""058 patent provides linearization of the power switch solely by using three states.
According to the ""058 patent, in an all digital implementation, a small fixed width, bi-state compensating pulse wave-form is added to the leading or trailing edges of an oversampled main input pulse producing a compensated waveform. This compensating pulse linearizes output from a power switch by effecting common mode cancellation of switch time errors.
A correction mechanism is implemented to correct for harmonic distortion resulting from the compensation pulse, also referred to as the pulse carrier or carrier, which is dependent on the modulation level or index. Harmonic distortion is corrected by the correction mechanism applying the inverse of the modulation induced distortion to the pre-processing of the input signal amplitude information so as to null distortion products resulting from the modulation scheme used to apply the small carrier to linearize the performance of the tri-state power switch.
The correction mechanism is implemented using digital signal processing (DSP) that facilitates application of the inverse of the modulation induced distortion to the over-sampled input signal. Coefficients required by the correction mechanism to compute the induced distortion correction are derived from a look-up table referenced by the estimated amplitude of the input signal.
In further accord with the ""058 patent, digital timing control of the power switch""s deadband is effected. Digital deadband control ensures accuracy of the timing and sequence in which individual switches within a power switch H-bridge are turned off and turned on, so as to preclude a situation where both upper and lower switches on one side of the bridge are both turned on at the same time. Accurate digital timing appropriately sequences the break-before-make timing to avoid a short circuit across the power supply. In the all digital design according to the ""058 patent, a high speed clock used to generate the pulse width modulated waveforms to linearize the output from the power switch by common mode cancellation of switch time errors, can also be used to provide a timing reference to generate the necessary deadband timing delays required for the power switches, producing a much more stable switching situation.
Additionally, in an all digital audio amplifier embodiment according to the ""058 patent, each individual switch""s timing can be adjusted appropriately to accomplish a zero-voltage switch transition between the main pulse and the compensating pulse by providing a short period in which non-e of the switches are turned on. A conventional bridge is implemented using enhancement mode MOSFETs so that current will continue to flow through the body source-drain diodes of the alternate two switches to be turned on causing the diodes to become forward biased. When the diodes are forward biased, the voltage across the off switches is substantially zero, permitting a cleaner turn-on. Use of enhancement mode MOSFETs in an H-Bridge switch configuration provides higher efficiency, faster switching speeds, and cleaner outputs with reduced Electromagnetic Interference (EMI), in the context of an all digital amplifier embodiment.
Bridged power output drives for amplifier circuits are well known. In general, all methods of using such bridged power outputs to drive an electrical load require the load to be connected between two output stages and that the two output stages are opposite in gain polarity. Such output configuration is used regardless of type of output stage. For example, any type of continuous analog or pulse width modulated output stages having bridged output drives are configured with antiphase gain amplifiers across a load.
A typical bridged output drive is illustrated in FIG. 1. When an applied signal at Vin has positive polarity, drive current flows from Vdd(A) through the load to Vss(B). When an applied signal at Vin has negative polarity, drive current flows from Vdd(B) through the load to Vss(A). The power supplies for the output stages may be unipolar, i.e. Vss=ground or bipolar, i.e. Vss=xe2x88x92Vdd.
Bridged output configurations advantageously provide twice the voltage across a load (2 (Vddxe2x88x92Vss) peak to peak), compared to a load that is driven by a single output stage having the same power supply voltage. FIG. 2 illustrates such a single ended output drive circuit wherein the maximum peak to peak voltage across the load is Vddxe2x88x92Vss. FIG. 3 illustrates a single ended output drive circuit wherein the maximum peak to peak voltage across the load is Vdd. The configuration according to FIG. 3 is required for single ended output stages driving a grounded load with a single supply voltage, i.e., Vss=ground.
AC applications of single ended output configurations having a grounded load as illustrated in FIG. 3 disadvantageously require an output coupling capacitor to block common mode DC components and thereby prevent continuous current from flowing through the load. Proper operation in AC applications driving a grounded load requires the input signal to cause the output signal to swing symmetrically about Vdd/2. The maximum peak to peak voltage available across the load is then Vdd. In comparison, the bridged configuration as illustrated in FIG. 1 provides maximum peak to peak voltage of 2 Vdd at the load for Vss=ground. Consequently, the bridged configuration provides four times the power of the single ended output configuration.
Known bridge configurations disadvantageously require independent xe2x80x9ccommonxe2x80x9d connectors. Multiple bridged output circuits require at a minimum four wire connections to their respective loads because both sides of each load are connected to active output stage components. This is particularly disadvantageous in certain low cost audio systems wherein it is desirable to minimize the number of conductors to drive two loads, for example in audio speakers or headphones wherein substantiated cost savings can be achieved by parts reduction and/or space savings.
U.S. Pat. No. 6,097,249 to Strickland, et al. entitled xe2x80x9cMethod and Device for Improved Class BD Amplification Having Single-Terminal Alternating-Rail Dual-Sampling Topologyxe2x80x9d (hereinafter referred to as xe2x80x9cthe Strickland patentxe2x80x9d) teaches a method of ground referencing a Class BD, (ternary), amplifier. The invention disclosed in the Strickland patent avoids using a bridged output stage by effectively placing a Class AD, (binary) output amplifier as a load element between two additional Class AD power supply amplifiers. The AD amplifiers are composed of half bridges: one operating between Vdd and ground and the other operating between ground and Vss. This configuration allows the output amplifier to provide a three state output to a load that is ground referenced wherein the three states are: positive voltage, Vdd; zero voltage, ground; and negative voltage, Vss. A Class BD, (ternary) output is thereby generated without a bridged output stage.
While the method taught by the Strickland patent could be used to allow sharing of a common conductor between two loads, it is too complex for applications requiring low cost or integrated circuit solutions. For example, in one embodiment the Strickland invention requires at least two power rails, Vdd and Vss, and a means of switching the output amplifier power rails to operate either between Vdd and Ground or Vss and Ground. For a single channel this requires a minimum of six switches to perform the function of four in a traditional H-bridge configuration. The large number of switches required makes such embodiments impractical for many applications. These embodiments also suffer the additional complexity of controlling the additional switches, i.e. the dual sampling.
In an alternate embodiment of the Strickland invention, a floating power supply system is described which eliminates one pole in the rail-alternation switch, that is, two of the six switches are eliminated. However, as the Strickland patent states, this embodiment suffers from a serious disadvantage in that it produces significant electromagnetic emissions that are difficult to suppress.
In either embodiment, the method and apparatus disclosed in the Strickland patent does not provide a solution for applications requiring any combination of low cost, low power or inclusion in integrated circ.
The present invention provides a (direct digital) PWM bridged output drive capable of providing two independent channels of pulse width modulated variable power output into two loads, (such as stereo loudspeakers or headphones), using only three conductors instead of the four normally required for two channels of a bridged amplifier output configuration.
According to the invention, implementation of two channels over only three conductors is accomplished by time division multiplexed use of a common lead between the two loads. Signals on the common conductor are time division multiplexed by offsetting the output channels by a half frame.
In an illustrative embodiment of the invention, four output conductors from an H-Bridge driver driving two channels are connected to the illustrative output stage. The four conductors are applied to the inputs of a set of three appropriately connected OR-gates. The OR-gates provide a set of three signals which when combined provide a pair of non-interfering time division multiplexed signals sharing a single common conductor. The set of OR-gates are configured to facilitate tracking of the common conductor by the non-common conductor on the off channel. Such tracking ensures that the differential signal on the off-channel is null.
The loads can be referenced to a common conductor similarly to the way ground is used as a common conductor when using a single supply configuration according to the present invention without requiring AC coupling capacitors as do single supply amplifiers of the prior art (e.g., as in FIG. 3), driving loads that are referenced to ground. Power delivered to such a load by a single power supply voltage according to the present invention is the same as the power delivered by the prior art amplifier stage even though it is only operating a maximum of half of the time resulting in a substantial increase in efficiency.
Features of the invention include provision of an amplifier that operates in a classical bridged configuration from a single power supply voltage while driving a load that shares a common conductor with another load. It does not require AC coupling (DC blocking) capacitors that limit low frequency response as do other single supply amplifier applications that reference the load to ground (e.g., as in FIG. 3).
The invention overcomes several limitations of the prior art and features a method and apparatus for multiplexing bridged output circuits to reduce the number of required output stage conductors driving multiple loads while maintaining the advantages of bridged output configurations. The invention also features a method and apparatus for multiplexing bridged outputs for AC applications using a reduced number of conductors and a reduced number of output stages and which does not require AC coupling capacitors. The invention further retains all of the benefits of the linearized tri-state power switch bridged drive configuration described in the ""058 patent. Because the bridged architecture produces the same power as the AC coupled amplifier of FIG. 3 while operating a maximum of half of the time, it provides at a minimum double the efficiency the prior art architectures.